Name: Accelerating Test, Validation and Debug of High Speed Serial Interfaces (en Inglés)
Price: 95.43 USD
Availability: InStock
Author: Fan, Yongquan ; Zilic, Zeljko
ISBN: 9789400789739

portada Accelerating Test, Validation and Debug of High Speed Serial Interfaces (en Inglés)

Accelerating Test, Validation and Debug of High Speed Serial Interfaces (en Inglés)

Formato

Libro Físico

Autor

Zeljko Zilic

Yongquan Fan

Editorial

Springer

Idioma

Inglés

N° páginas

194

Encuadernación

Tapa Blanda

Dimensiones

23.4 x 15.6 x 0.6 cm

Peso

0.17 kg.

ISBN13

9789400789739

Categorías

Ingeniería electrónica
Dispositivos lectores de libros digitales, tabletas y otros dispositivos portátiles: guías para el consumidor/usuario
Teléfonos móviles: guías para el consumidor/usuario
Análisis y diseño de sistemas

Accelerating Test, Validation and Debug of High Speed Serial Interfaces (en Inglés)

Zeljko Zilic (Autor) · Yongquan Fan (Autor) · Springer · Tapa Blanda

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Reseña del libro "Accelerating Test, Validation and Debug of High Speed Serial Interfaces (en Inglés)"

High-Speed Serial Interface (HSSI) devices have become widespread in communications, from the embedded to high-performance computing systems, and from on-chip to a wide haul. Testing of HSSIs has been a challenging topic because of signal integrity issues, long test time and the need of expensive instruments. Accelerating Test, Validation and Debug of High Speed Serial Interfaces provides innovative test and debug approaches and detailed instructions on how to arrive to practical test of modern high-speed interfaces.Accelerating Test, Validation and Debug of High Speed Serial Interfaces first proposes a new algorithm that enables us to perform receiver test more than 1000 times faster. Then an under-sampling based transmitter test scheme is presented. The scheme can accurately extract the transmitter jitter and finish the whole transmitter test within 100ms, while the test usually takes seconds. The book also presents and external loopback-based testing scheme, where and FPGA-based BER tester and a novel jitter injection technique are proposed. These schemes can be applied to validate, test and debug HSSIs with data rate up to 12.5Gbps at a lower test cost than pure ATE solutions. In addition, the book introduces an efficieng scheme to implement high performance Gaussian noise generators, suitable for evaluating BER performance under noise conditions.