Name: Design and Test Strategies for 2d (en Inglés)
SKU: 52751736
Price: 54.12 USD
Availability: InStock
Author: Kanchan Manna; Jimson Mathew

portada Design and Test Strategies for 2d (en Inglés)

Design and Test Strategies for 2d (en Inglés)

Formato

Libro Físico

Editorial

Springer

Autor

Kanchan Manna; Jimson Mathew

Año

2019

Idioma

Inglés

N° páginas

162

Encuadernación

Tapa Dura

ISBN13

9783030313098

N° edición

Categorías

Arquitectura y diseño lógico de ordenadores

Design and Test Strategies for 2d (en Inglés)

Kanchan Manna; Jimson Mathew (Autor) · Springer · Tapa Dura

Libro Nuevo Importado

Envío: 16 a 23 días háb.

$ 108.24$ 54.12

-50%

Costos de importación incluídos en el precio ✅

Libro Nuevo

Quedan más de 100 unidades

$ 54.12

Llega entre el 15 Sep y el 28 Sep a Quito, Pichincha. Seleccionar ubicación

Agregar a lista de deseos

Reseña del libro "Design and Test Strategies for 2d (en Inglés)"

This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications. Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.