Name: High-Level Estimation and Exploration of Reliability for Multi-Processor System-On-Chip (Computer Architecture and Design Methodologies) (en Inglés)
SKU: 50886350
Price: 95.47 USD
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Author: Zheng Wang; Anupam Chattopadhyay

portada High-Level Estimation and Exploration of Reliability for Multi-Processor System-On-Chip (Computer Architecture and Design Methodologies) (en Inglés)

High-Level Estimation and Exploration of Reliability for Multi-Processor System-On-Chip (Computer Architecture and Design Methodologies) (en Inglés)

Formato

Libro Físico

Editorial

Springer

Autor

Zheng Wang; Anupam Chattopadhyay

Año

2017

Idioma

Inglés

N° páginas

197

Encuadernación

Tapa Dura

ISBN13

9789811010729

N° edición

Categorías

Ciencias de la computación

High-Level Estimation and Exploration of Reliability for Multi-Processor System-On-Chip (Computer Architecture and Design Methodologies) (en Inglés)

Zheng Wang; Anupam Chattopadhyay (Autor) · Springer · Tapa Dura

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Reseña del libro "High-Level Estimation and Exploration of Reliability for Multi-Processor System-On-Chip (Computer Architecture and Design Methodologies) (en Inglés)"

This book introduces a novel framework for accurately modeling the errors in nanoscale technology and developing a smooth tool flow at high-level design abstractions to estimate error effects, which aids the development of high-level fault-tolerant techniques. In total, the book presents 6 solutions for reliability estimation (3 for fault injection and 3 for analytical estimation) and 5 techniques for reliability exploration (3 for architectural level and 2 for system-level). It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.