Name: Implementation of a High-Speed FPGA and DSP Based FFT Processor for Improving Strain Demodulation Performance in a Fiber-Optic-Based Sensing System (en Inglés)
SKU: 59968231
Price: 26.77 USD
Availability: InStock
Author: Farley, Douglas L. ; Nasa Technical Reports Server (Ntrs)
ISBN: 9781289238803

portada Implementation of a High-Speed FPGA and DSP Based FFT Processor for Improving Strain Demodulation Performance in a Fiber-Optic-Based Sensing System (en Inglés)

Implementation of a High-Speed FPGA and DSP Based FFT Processor for Improving Strain Demodulation Performance in a Fiber-Optic-Based Sensing System (en Inglés)

Formato

Libro Físico

Autor

Nasa Technical Reports Server (Ntrs)

Douglas L. Farley

Editorial

Bibliogov

Idioma

Inglés

N° páginas

Encuadernación

Tapa Blanda

Dimensiones

24.6x18.9x0.2 cm

Peso

0.08 kg.

ISBN13

9781289238803

Categorías

Política y gobierno

Implementation of a High-Speed FPGA and DSP Based FFT Processor for Improving Strain Demodulation Performance in a Fiber-Optic-Based Sensing System (en Inglés)

Nasa Technical Reports Server (Ntrs) (Autor) · Douglas L. Farley (Autor) · Bibliogov · Tapa Blanda

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Reseña del libro "Implementation of a High-Speed FPGA and DSP Based FFT Processor for Improving Strain Demodulation Performance in a Fiber-Optic-Based Sensing System (en Inglés)"

NASA's Aviation Safety and Security Program is pursuing research in on-board Structural Health Management (SHM) technologies for purposes of reducing or eliminating aircraft accidents due to system and component failures. Under this program, NASA Langley Research Center (LaRC) is developing a strain-based structural health-monitoring concept that incorporates a fiber optic-based measuring system for acquiring strain values. This fiber optic-based measuring system provides for the distribution of thousands of strain sensors embedded in a network of fiber optic cables. The resolution of strain value at each discrete sensor point requires a computationally demanding data reduction software process that, when hosted on a conventional processor, is not suitable for near real-time measurement. This report describes the development and integration of an alternative computing environment using dedicated computing hardware for performing the data reduction. Performance comparison between the existing and the hardware-based system is presented.