portada Writing Testbenches: Functional Verification of Hdl Models (en Inglés)

Writing Testbenches: Functional Verification of Hdl Models (en Inglés)

Formato

Libro Físico

Autor

Janick Bergeron

Editorial

Springer

Idioma

Inglés

N° páginas

478

Encuadernación

Tapa Blanda

Dimensiones

23.4x15.6x2.6 cm

Peso

0.71 kg.

ISBN13

9781461350125

N° edición

0002

Categorías

Anestesiología
Ordenadores personales
Compiladores e intérpretes

Writing Testbenches: Functional Verification of Hdl Models (en Inglés)

Janick Bergeron (Autor) · Springer · Tapa Blanda

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mental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches- all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test- benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification.